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In previous counters that you have created, you set the upper limit as the value just past the last digit you wanted displayed. That is not the case with this design. Why is how you set the range different for this design?

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Answer:

The Synchronous load is synchronous and the Asynchronous load input is delayed with the counter pulse by one when it counts up.

Explanation:

The Synchronous load is synchronous and when it goes through the input load then the count from the Q outputs will stay the same. The Asynchromous load input is bit different and it delays the counters pulse by one when it counts up. it adds 1 to the pulse when it counts down. This means that it will either add or subtract 1 to the restart/maximum binary count.

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